The specific simulation workflow is as follows:

1. 1. A full 3D finite-element electromagnetic simulation is performed on a simplified version of the design’s geometry. The simulation yields S-parameter data and a spatial distribution of power dissipation within the design.
   2. A full 3D finite-element thermal simulation is run on the electromagnetic simulation’s model, augmented to include geometry relevant to thermal and mechanical (but not electrical) performance. As shown in Fig. 5, effort was made to accurately model critical regions of simulation geometry, such as hollow and solder-filled PTHs. The simulation employs the power dissipation computed from the electromagnetic simulation and yields a temperature distribution within the model’s geometry.
   3. A full 3D finite-element mechanical simulation is run on the full model geometry, employing the spatial temperature distribution as part of its setup. The simulation yields mechanical strains and stresses within the model geometry.
   4. If desired, the above process may be iterated until convergence criteria are met, feeding the temperature rise information and model geometry deformation into the electrical simulator for the next pass. In practice, a single pass is often sufficient to achieve outstanding agreement between simulation results and physical measurements.

While more complex than a workflow involving separate electrical, thermal, and mechanical simulation tasks, a true multi-physics simulation workflow provides design engineers with a holistic view of a design’s performance. For example, a traditional thermal simulation of a microstrip conductor may involve a uniformly-distributed heat source applied to the conductor’s volume or faces. Such an approach discards valuable information about localized heat generation, since current densities at millimeter-wave frequencies are nonuniform. A multi-physics simulation approach implicitly captures this effect and others without needing attention from the designer.

The ability of a multi-physics simulation to automatically account for conditions too complex to set up manually is especially valuable for LTCC designs. As LTCC designs consist of a monolithic ceramic structure with complex internal conductor geometry, thermal images of the exterior of such a device may not fully reveal its internal thermal behavior.

Because the electrical, thermal, and mechanical aspects of a design’s performance are often linked (due to temperature-dependent electrical resistivities, thermal expansion, and so on), such a simulation workflow makes it possible to best understand the impact of design decisions on interrelated aspects of performance. The workflow has been qualified through multiple projects involving several technologies, and achieves simulation results in very close agreement with performance measurements. As with other portions of Mini-Circuits’ established LTCC process, it is subject to continual evaluation and improvement.

3. CUSTOMIZATION VS.  STANDARDIZATION

Although the QFN package has been an industry workhorse for both active and passive electronic components up to V-band [7], its highly-standardized nature makes it a sub-optimal solution for some applications. As applications march towards millimeter-wave frequencies, packaging technologies must adapt to widely-varying industry needs.

While a one-size-fits-all solution may fit all applications equally poorly, a fully-custom solution yielding outstanding results may be cost- and time prohibitive. To develop a rapid, cost-effective packaging solution that still offers outstanding application flexibility, it was desirable to combine industry-standard processes and tunable design features into a customizable package template. This ‘templated’ approach to package design allows for the reuse of proven design elements, reducing the effort and risk incurred by from-scratch solutions. Facilities for adaptation to an application’s specific electrical, thermal, mechanical, and environmental needs are provided while minimizing or eliminating the need for extensive qualification of new designs.

QFN packages are typically available in a granular range of standardized sizes (3 mm ×  3 mm, 4 mm ×  4 mm, and so on), while an MMIC die may be any size and aspect ratio. A die that is slightly too large to fit one standard QFN package size must instead use the next size up, necessitating long wirebonds with correspondingly large parasitic inductances. The package itself offers little facility to compensate for these parasitics, a task relegated instead to conductor geometry on the PCB and die. Furthermore, QFN packages employ a plastic encapsulant which envelops the leadframe, die, and wirebonds. Delicate structures on the MMIC die such as air bridges are incompatible with such an encapsulation process; even in the absence of incompatible MMIC features, the encapsulant may detune or degrade the performance of sensitive electronics simply by proximity. Finally, the terminals of the QFN package are highly standardized with little flexibility of the pad sizes and geometries. For some applications, the electrical parasitics associated with the fixed transition geometry may be unacceptable.

Mini-Circuits’ custom LTCC and organic substrate packages address the above limitations, offering solutions with sufficient flexibility to meet the needs of a wide variety of applications. In these packages, the die inhabits a pocket atop the substrate as shown in Fig. 1 and Fig. 2. The pocket’s dimensions are specified according to the customer’s die so that wirebond pads can be brought as close to the die as possible, minimizing bondwire length and inductance. Therefore the LTCC and organic substrate packages offer greater flexibility with regard to MMIC die sizes even though they are currently available in the same sizes as standard QFN packages, 3 mm × 3 mm, 4 mm × 4 mm, and 5 mm × 5 mm. A plastic lid is affixed over the die and wire bonds with a B-staged epoxy compound, maintaining an air gap above the die and wirebonds and achieving a semi-hermetic seal. The use of an air gap rather than an encapsulant permits the packaging of delicate MMIC structures and minimizes the degradation of electrical performance.

Unlike QFN packages, the LTCC and organic substrate packages offer the flexibility needed to best suit a wide variety of applications. The package structure contains tunable elements that electrically compensate for the parasitics associated with the transitions from the PCB to the package and from the package to the MMIC die. Furthermore, since the package features printed conductors rather than a solid leadframe, the footprints of the LTCC and organic substrate packages can be customized with minimal tooling cost.

4. EXAMPLES

To validate the design and to measure the performance of the organic and LTCC packages, multiple packages were designed, fabricated, and tested. The packages were assembled and soldered on 5~mil Taconic TLY-5 evaluation PCBs with 50 Ω GCPW traces. 2.4 mm Southwest Microwave edge-launch connectors were used to interface the PCBs with the Vector Network Analyser (VNA).

Standard Short-Open-Load-Thru (SOLT) calibration was performed up to 55 GHz, up to the reference plane of the connectors. The insertion loss measurements for each package are normalized by subtracting the losses of the PCB thru-line.

A. MMIC 2 dB Attenuator on Organic Package

A 2 dB MMIC attenuator is mounted and wirebonded on top of an organic package. Fig. 6 shows the package mounted on top of the PCB, as well as a close up of the package without the lid, showing the die and the wirebonds.  Fig. 7 shows the measured data of the device. The S₂₁ trace shows a very flat response of -2 dB up to 48 GHz. A good return loss is also observed for the entire frequency bandwidth.