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Eliminating Bias Tees from Push-Pull Amplifier Outputs Using TCM3-452X+ 3:1 Unbalanced-to-Balanced Transformer

Daxiong Ji & Brandon Kaplan, Mini-Circuits

Push-pull amplifiers are used in many multi-octave systems to enhance amplifier output power and efficiency, suppress unwanted harmonics and improve system dynamic range.  In a push-pull amplifier design, two matched transistors or amplifiers are supplied by the source signal in parallel and at a 180° phase relationship.  When re-combined through a second 180° phase shifting combiner, the fundamental signals are in-phase and combined at twice the power of each half, while the even order harmonics are out-of-phase, creating ideal cancellation of these unwanted signals.  In reality, the phase and amplitude unbalance of the splitting-combining circuits result in degradation of the ideal cancellation.  However, the net result is still significant suppression of the even harmonics, typically by 20 to 40 dB.

Circuit Topologies

Phase splitting at the amplifier input is usually accomplished by using a balanced-to-unbalanced transformer.  At the output, the two halves of the signal are re-combined with an unbalanced-to-balanced transformer, but because the amplifier stage requires DC current, biasing is needed at the amplifier output.  A common approach to biasing at the output of a push-pull amplifier is to use two bias tees as shown in figure 1.

Figure 1: Push-pull amplifier output stage with bias-tees before transformer.

This design effectively isolates DC current from RF signal, but it also comes with a number of disadvantages.  Using bias-tees to isolate the DC current at the amplifier output adds the cost of additional components to the system design, occupies board real-estate and introduces additional losses to the signal chain depending on the match of the particular bias-tees used.  This article will introduce an alternative design for the output stage of push-pull amplifiers using Mini-Circuits’ TCM3-452X+ unbalanced-to-balanced transformer with DC blocks to eliminate the need for bias-tees, thereby reducing cost, saving space in PCB layouts, and reducing overall system insertion loss.

Designing Bias-Tees out of the Amplifier Output

Mini-Circuits’ TCM3-452X+ is a wideband (20 to 4500 MHz) unbalanced to balanced 3:1 transformer.  This is a balanced transmission line type transformer with a secondary center tap providing low insertion loss (1.5 dB typ.) with low phase and amplitude unbalance (4˚ and 0.5 dB, respectively) making it an excellent candidate for use in a wide variety of push-pull amplifier applications.  A case image and schematic of this model are shown in figure 2.

Figure 2: TCM3-452X+ balun case style and schematic

This transformer can be used at the output of a push-pull amplifier using the traditional approach with direct grounding and bias tees before the inputs as shown in figure 3.

Figure 3: TCM3-452X+ in push-pull amplifier output

Theoretically, the two bias tees can be omitted from the circuit by using DC blocks as shown in figure 4

Figure 4: TCM3-452X+ in output stage of push-pull amplifier with 3 DC blocks

Because the DC currents in the coupled windings of the transformer flow in opposite directions, there is no DC magnetic field, and the transformer’s ferrite core is not saturated.  Empirically, simply adding the three DC blocks as shown above only exhibits good performance up to about 1500 MHz because grounding through the DC blocks is imperfect.  However, by adding the DC blocks with additional capacitors in the layout shown in figure 5, the transformer can operate with reasonably comparable performance to that achieved with direct grounding up to 4000 MHz.

Figure 5: Schematic of layout for TCM3-452X+ with DC blocks and capacitors

Validating Transformer Performance with DC Blocks

To validate the performance of TCM3-452X+ in this configuration, the transformer was tested in a side-by-side comparison between the DUT alone versus the DUT mounted with DC blocks and capacitors as shown in figure 5.  The test fixture used to test the DUT with DC blocks is illustrated in figure 6 and corresponds to the layout in figure 5.  Insertion loss, return loss, phase unbalance and amplitude unbalance were swept from 1 to 4000 MHz with auto port extension and Z-conversion applied.  Plots comparing the data sampled from each test fixture are shown in figures 7a – 7d.

Figure 6: Evaluation board and circuit for TCM3-452X+ configured with DC blocks and capacitors as shown in Figure 5.

Figure 7a: Comparison of insertion loss for TCM3-452X+ with and without DC blocks. (Does not include 3 dB theoretical loss).

Figure7b: Comparison of return loss at port S for TCM3-452X+ with and without DC blocks.

Figure 7c: Comparison of amplitude unbalance for TCM3-452X+ with and without DC blocks.

Figure 7d: Comparison of phase unbalance for TCM3-452X+ with and without DC blocks

These test results show comparable performance between the two test fixtures with three exceptions worth mentioning.  First, insertion loss of TCM3-452X+ increases slightly from about 2000 MHz to 4000 MHz when configured with DC blocks as compared to the performance of the DUT alone.  However, assuming the typical insertion loss of a bias tee over this bandwidth can range from about 0.3 to greater than 1 dB, the insertion loss exhibited by the unit when the DC blocks are added is highly preferable to the losses otherwise introduced from the addition of two bias tees at the output of the amplifier.

Secondly, the amplitude unbalance shown by the TCM3-452X+ with DC blocks exhibits lower amplitude unbalance over much of the frequency range tested.  This represents an improvement in the performance of the unit in the proposed configuration compared to that of the unit alone.

Finally, when used with DC blocks, the transformer exhibits some degradation in return loss across the 2000 to 4000 MHz band.  Over this range, the suitability of this design approach will therefore depend on the designer’s individual system requirements.


Using TCM3-452X+ with DC blocks in the layout shown in figure 5 enables the design of push-pull amplifiers without the need for bias tees at the output.  This design approach achieves good balun performance from 20 to 4000 MHz, making it suitable for a wide range of push-pull amplifier applications.  While some degradation of the transformer’s return loss may be observed at some frequencies in the upper portion of the band, the benefits achieved by designing bias tees out of the signal chain still offer potentially significant improvements in overall system performance, conservation of board space, and reduction in design cost.

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